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Education, Licensure and Certification (3)
Ph.D.: Computer Engineering, Old Dominion University 2012
M.S.: Computer Engineering, Old Dominion University 2006
B.S.: Computer Engineering, Old Dominion University 2004
Biography
Dr. Adam Livingston is an associate professor in the Electrical, Computer and Biomedical Engineering department and has been a faculty member at MSOE since 2013. His areas of expertise include image processing for automated feature detection with statistical learning methods; ASIC design for video enhancement; and big data machine learning. He also is a visiting researcher at Direct Supply, and has worked as a consultant for Red Hat Consulting and research scientist for Acuity Science and Technology Services LLC.
Areas of Expertise (4)
Electrical Engineering
Higher Education
Computer Engineering
Engineering Education
Accomplishments (2)
Faculty Award, ODU ECE Department
2004
Outstanding Masters Research Award, ODU ECE Department
2006
Affiliations (2)
- American Society for Engineering Education (ASEE) : Member
- Institute of Electrical and Electronics Engineers (IEEE) : Member
Event and Speaking Appearances (5)
Multi-sensor image fusion and enhancement system for assisting drivers in poor lighting conditions
IEEE Computer Society Proceedings of the International Workshop on Applied Imagery and Pattern Recognition, AIPR 2005 Washington DC, October 19 - 21, 2005
Regional variance dependent sub-frame reduction for face detection in video streams
IEEE Computer Society Proceedings of the International Workshop on Applied Imagery and Pattern Recognition, AIPR 2007 Washington, D.C., October 10-12, 2007
An efficient VLSI architecture for 2-D convolution with quadrant symmetric kernels
IEEE Computer Society Proceedings of the International Symposium on VLSI, ISVLSI 2005 Tampa, Florida, May 11 - 12, 2005
A visibility improvement system for low vision drivers by nonlinear enhancement of fused visible and infrared video
IEEE 1st Workshop on Computer Vision Applications for the Visually Impaired San Diego, CA, June 20 -25, 2005
Design of a real time system for nonlinear enhancement of video streams by an integrated neighborhood dependent approach
IEEE Computer Society Proceedings of the International Symposium on VLSI, ISVLSI 2005 Tampa, Florida, May 11 -12, 2005
Selected Publications (4)
Using Shadowing to Improve New Faculty Acclimation
ASEE Annual Conference & ExpositionWilliams, S. M., Hasker, R. W., Holland, S., Livingston, A. R., Widder, K. R., Yoder, J. A.
2014 Using Shadowing to Improve New Faculty AcclimationA shadowing program for assisting new faculty members in becoming successful educators attheir new institution is described. This program aims to foster a dialogue between new facultyand seasoned colleagues, providing opportunities for sharing lessons learned through experience.At the beginning, a new faculty member observes lectures delivered by a colleague teachinganother section of their course, providing practical examples of how the institution’sexpectations translate into practice, as well as pedagogical ideas for effective instruction.Reciprocal observation by the seasoned faculty member provides early feedback to the newfaculty member that is valuable in getting off to a good start. Details of the structure of theshadowing program are presented. Five case studies are offered by faculty who went through theprogram. They share their experiences in how the program was effective for them and in how itcould be improved.
Learning as a nonlinear line of attraction in a recurrent neural network
Neural Computing and ApplicationsSeow, M.J., Asari, V.K., Livingston, A.
2010 A method to embed N dimensional, multi-valued patterns into an auto-associative memory represented as a nonlinear line of attraction in a fully connected recurrent neural network is presented in this paper. The curvature of the nonlinear attractor is defined by the Kth degree polynomial line which best fits the training data in N dimensional state space. The width of the nonlinear line is then characterized by the statistical characteristics of the training patterns. Stability of the recurrent network is verified by analyzing the trajectory of the points in the state space during convergence. The performance of the network is benchmarked through the reconstruction of original gray-scale images from their corrupted versions. It is observed that the proposed method can quickly and successfully reconstruct each image with an average convergence rate of 3.10 iterations.
A real-time emotion detection system for human computer interaction: A binary decision tree approach
Journal of Neural Computing and ApplicationsSeow, M.J., Asari, V.K., Livingston, A.
2010 A method to embed N dimensional, multi-valued patterns into an auto-associative memory represented as a nonlinear line of attraction in a fully connected recurrent neural network is presented in this paper. The curvature of the nonlinear attractor is defined by the Kth degree polynomial line which best fits the training data in N dimensional state space. The width of the nonlinear line is then characterized by the statistical characteristics of the training patterns. Stability of the recurrent network is verified by analyzing the trajectory of the points in the state space during convergence. The performance of the network is benchmarked through the reconstruction of original gray-scale images from their corrupted versions. It is observed that the proposed method can quickly and successfully reconstruct each image with an average convergence rate of 3.10 iterations.
A high performance architecture for implementation of 2-D convolution with quadrant symmetric kernels
International Journal of Computers and ApplicationsZhang, M.Z., Ngo, H.T., Livingston, A.R., Asari, V.K.
2008 The design of a high performance digital architecture for computing 2-D convolution, utilizing the quadrant symmetry of the kernels, is proposed in this paper. Pixels in the four quadrants of the kernel region, with respect to an image pixel, are considered simultaneously for computing the partial products of the convolution sum. A novel data handling strategy, to identify pixels to be fed to different processing elements, helps reduce the data storage requirements significantly in the circuitry. The systolic architecture employs parallel and pipelined processing and is able to produce one output every clock cycle. The new design resulted in, approximately, a 75% reduction in number of multipliers and a 50% reduction in the number of adders, when compared to the conventional systolic architecture. The proposed architecture design is capable of performing convolution operations for 57 1,024 Ă— 1,024 frames, or 59.77 million outputs per second, in a Xilinx's Virtex 2v2000ff896-4 FPGA at maximum clock frequency of 59.77 MHz. The error analysis performed in two image processing applications, namely noise filtering and edge detection, shows that the hardware implementation with the proposed design provides results similar to that of the software implementation.