Reza Azarderakhsh, Ph.D.
Associate Professor, I-SENSE Fellow, Founder of PQSecure | Florida Atlantic University
Boca Raton, FL, UNITED STATES
Reza Azarderakhsh's primary research interests are in cryptography and security.
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Biography
Reza Azarderakhsh is an associate professor in the Department of Computer and Electrical Engineering and Computer Science at Florida Atlantic University, as well as an I-SENSE research fellow. He received his Ph.D. in computer engineering from Western University. After that, he was an NSERC post-doctorate research fellow at the Center for Applied Cryptographic Research, Department of Combinatorics and Optimization at the University of Waterloo, where he is currently an affiliate supervisor member of CryptoWorks21. He is also serving as an associate editor of the IEEE Transactions on Circuits and Systems (TCAS-I) cryptographic engineering track. His research has been supported by NSF, NIST, Florida Center for Cyber Security (FC2), and Texas Instruments.
Azarderakhsh's primary research interests are in cryptography and security, with particular interest in cryptographic engineering, side-channel analysis, elliptic curve cryptography, finite field arithmetic, post-quantum cryptography, and hardware/software implementations.
Areas of Expertise (7)
Cyber Security
Cryptographic Engineering
Quantum-Safe Cryptography
IoT and Embedded Device Security
Blockchain Security
Private AI
Side-channel and Physical Attacks on Cryptography
Education (2)
University of Waterloo: Post Doctoral Fellow, Applied Cryptography
Western University: Ph.D., Computer Engineering
Affiliations (3)
- IEEE Transactions on Circuits and Systems (TCAS-I) : Associate Editor
- PQSecure Technologies : Founder and President
- Quantum Economic Development Consortium (QED-C) : Member
Links (2)
Selected Media Appearances (4)
The future will see sophisticated hacking. This South Florida company wants to help
Miami Herald
2020-02-18
“We are convincing people that this is going to be a real problem, that they need to consider quantum-safe cryptography,” said Reza Azarderakhsh, PQSecure’s co-founder. “Otherwise they are going to lose a lot of data, and their privacy will be threatened.” PQSecure grew out of Azarderakhsh’s computer engineering lab at Florida Atlantic University. Azarderakhsh, who has a Ph.D. in computer engineering from Western University in Canada, says it is not easy to run a high-tech company out of South Florida, especially given how much more money might be available for companies like PQSecure in places like Silicon Valley. But he remains committed to doing so...
Smart-home devices could be easy to hack, here’s how to protect yourself
Arizona Daily Sun
2020-01-19
Reza Azarderakhsh, associate professor of computer science at Florida Atlantic University in Boca Raton, said that while changing the password for your device is always a good idea, it shouldn’t give you a false sense of security. “It doesn’t make you secure against a serious cyberattack,” he said...
Your smart-home devices could be easy to hack. Here’s how to protect yourself
Pocono Record
2020-01-13
Reza Azarderakhsh, associate professor of computer science at Florida Atlantic University in Boca Raton, said that while changing the password for your device is always a good idea, it shouldn’t give you a false sense of security. “It doesn’t make you secure against a serious cyberattack,” he said...
Hacking will soon take place in the blink of an eye. This firm plans to play defense
Miami Herald
2019-04-29
PQSecure co-founder Reza Azarderakhsh gives the example of email. Right now, it would take months to a year to hack encrypted email. Some hackers are simply storing emails in anticipation of of quantum computers that will allow them to hack emails in a matter of days. “We need to ensure we are not only protecting against attacks of current computers, but when quantum computers arrive,” he said...
Selected Articles (5)
A post-quantum digital signature scheme based on supersingular isogenies
International Conference on Financial Cryptography and Data SecurityYoungho Yoo, Reza Azarderakhsh, Amir Jalali, David Jao, Vladimir Soukharev
2017 We present the first general-purpose digital signature scheme based on supersingular elliptic curve isogenies secure against quantum adversaries in the quantum random oracle model with small key sizes. This scheme is an application of Unruh’s construction of non-interactive zero-knowledge proofs to an interactive zero-knowledge proof proposed by De Feo, Jao, and Plût. We implement our proposed scheme on an x86-64 PC platform as well as an ARM-powered device. We exploit the state-of-the-art techniques to speed up the computations for general C and assembly. Finally, we provide timing results for real world applications.
Post-quantum cryptography on FPGA based on isogenies on elliptic curves
IEEE Transactions on Circuits and Systems I: Regular Papers 64Brian Koziel, Reza Azarderakhsh, Mehran Mozaffari Kermani, David Jao
2016 To the best of our knowledge, we present the first hardware implementation of isogeny-based cryptography available in the literature. Particularly, we present the first implementation of the supersingular isogeny Diffie-Hellman (SIDH) key exchange, which features quantum-resistance. We optimize this design for speed by creating a high throughput multiplier unit, taking advantage of parallelization of arithmetic in F p2 , and minimizing pipeline stalls with optimal scheduling. Consequently, our results are also faster than software libraries running affine SIDH even on Intel Haswell processors. For our implementation at 85-bit quantum security and 128-bit classical security, we generate ephemeral public keys in 1.655 million cycles for Alice and 1.490 million cycles for Bob. We generate the shared secret in an additional 1.510 million cycles for Alice and 1.312 million cycles for Bob. On a Virtex-7, these results are approximately 1.5 times faster than known software implementations running the same 512-bit SIDH. Our results and observations show that the isogeny-based schemes can be implemented with high efficiency on reconfigurable hardware.
Key compression for isogeny-based cryptosystems
Proceedings of the 3rd ACM International Workshop on ASIA Public-Key CryptographyReza Azarderakhsh, David Jao, Kassem Kalach, Brian Koziel, Christopher Leonardi
2016 We present a method for key compression in quantumresistant isogeny-based cryptosystems, which allows a reduction in and transmission costs of per-party public information by a factor of two, with no e ect on security. We achieve this reduction by associating a canonical choice of elliptic curve to each j-invariant, and representing elements on the curve as linear combinations with respect to a canonical choice of basis. This method of compressing public information can be applied to numerous isogeny-based protocols, such as key exchange, zero-knowledge identi cation, and public-key encryption. We performed personal computer and ARM implementations of the key exchange with compression and decompression in C and provided timing results, showing the computational cost of key compression and decompression at various security levels. Our results show that isogeny-based cryptosystems achieve by far the smallest possible key sizes among all existing families of post-quantum cryptosystems at practical security levels; e.g. 3073-bit public keys at the quantum 128-bit security level, comparable to (non-quantum) RSA key sizes.
Low complexity multiplier architectures for single and hybrid-double multiplications in Gaussian normal bases
IEEE Transactions on ComputersReza Azarderakhsh, Arash Reyhani-Masoleh
2013 The extensive rise in the number of resource constrained wireless devices and the needs for secure communications with the servers imply fast and efficient cryptographic computations for both parties. Efficient hardware implementation of arithmetic operations over finite field using Gaussian normal basis is attractive for public key cryptography as it provides free squarings. In this paper, we first present two low-complexity digit-level multiplier architectures. It is shown that the proposed multipliers outperform the existing Gaussian normal basis (GNB) multiplier structures available in the literature. Then, for the first time, using these two architectures, we propose a new digit-level hybrid multiplier which performs two successive multiplications with the same latency as the one for one multiplication. We have studied the efficiency of the proposed hybrid architecture in terms of area and time delay for different digit sizes. The main advantage of this new hybrid architecture is to speed up exponentiation and point multiplication whenever double-multiplication is required and the traditional schemes fail due to the data dependencies. We have investigated the applicability of the proposed hybrid structure to reduce the latency of exponentiation-based cryptosystems. Our analysis and timing results show that the expected acceleration in double-exponentiation is considerable. Prototypes of the presented low-complexity multiplier architectures and the proposed hybrid architecture are implemented and experimental results are presented.
Efficient FPGA implementations of point multiplication on binary Edwards and generalized Hessian curves using Gaussian normal basis
IEEE Transactions on Very Large Scale Integration (VLSI) SystemsReza Azarderakhsh, Arash Reyhani-Masoleh
2011 Efficient implementation of point multiplication is crucial for elliptic curve cryptographic systems. This paper presents the implementation results of an elliptic curve crypto-processor over binary fields GF(2 m ) on binary Edwards and generalized Hessian curves using Gaussian normal basis (GNB). We demonstrate how parallelization in higher levels can be performed by full resource utilization of computing point addition and point-doubling formulas for both binary Edwards and generalized Hessian curves. Then, we employ the ω-coordinate differential formulations for computing point multiplication. Using a lookup-table (LUT)-based pipelined and efficient digit-level GNB multiplier, we evaluate the LUT complexity and time-area tradeoffs of the proposed crypto-processor on an FPGA. We also compare the implementation results of point multiplication on these curves with the ones on the traditional binary generic curve. To the best of the authors' knowledge, this is the first FPGA implementation of point multiplication on binary Edwards and generalized Hessian curves represented by ω-coordinates.
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