Timothy Johnson, Ph.D.
Associate Professor Milwaukee School of Engineering
- Milwaukee WI
Dr. Timothy Johnson is a 30 year industry veteran with expertise in integrated circuit design, embedded systems and computer architecture.
Milwaukee School of Engineering
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Education, Licensure and Certification
B.S.
Electrical Engineering
Purdue University
1981
M.S.
Electrical Engineering
Purdue University
1983
M.B.A.
Business
Florida Institute of Technology
1987
Ph.D.
Electrical Engineering
Florida Institute of Technology
1997
Biography
Areas of Expertise
Affiliations
- Institute of Electrical and Electronics Engineers (IEEE) : Member
- Eta Kappa Nu
- Tau Beta Pi
Social
Patents
High speed A/D converter and slew controlled pulse detector
US5808489A
A pulse detecting system 1 has a high speed A/D converter 10 and a slew controlled pulse detector 110. The A/D converter 10 has large hysteresis for holding the converted digital value of an input signal VPULSE until the A/D converter 10 is reset. The slew controlled pulse detector 110 limits the slew rate of large amplitude pulse to correct arrival errors and provide an output signal VAT that more accurately represents the arrival time of the input pulse signal, VPULSE.
Sampled data-biasing of continuous time integrated circuit
US5621355A
Process-dependent characteristics of a continuous time circuit, e.g., particular the sensitivity of the corner frequency of a continuous time filter to variations in absolute capacitance, is obviated by modifying a resistance-based transconductance tuning circuit, so that the tuning resistor is replaced with a switched capacitor circuit. The effect of this switched sampled data resistor replacement is such that, if each of the resistor-simulating switched capacitor of the transconductance stage and one or more load capacitors of the filter is established in the same processing sequence, what would otherwise be process-sensitive terms in the corner frequency-establishing ratio (gm /C) effectively cancel each other, so that the corner frequency fhi becomes proportional to a readily controlled frequency parameter for the sampled data resistor.
Fuse programmable DC level generator
US4686384A
A high reliability, low power fuse programmable DC level generator is implemented by providing at least one fuse in each branch of a resistive bridge such that programming of the level generator results in providing a blown fuse in the current path and as a consequence results in low current and low power under all operating conditions.
Internally synchronous matrix structure for use in externally asynchronous programmable devices
US4658253A
The speed of operation of a programmable logic device which contains internally synchronous circuit structure is increased by an improved architecture which does not require a power-up transition cycle. Synchronous operation is carried out only for one transition. In each column of the matrix of programmable cells, the rows of which are coupled to receive the logic signals upon which the device is to operate, the programmable cells of that column are coupled via a respective inverter feedback pair to a column output link of the matrix. The connection between the programmable cells of the matrix and the inverter feedback pairs are coupled to pull-down switch devices control inputs of which are coupled to the output of an OR tie, inputs or which depend upon a prescribed transition on row input links. This transition is detected by respective transition detectors which trigger only on a particular transition edge. When the row inputs to the matrix change state, the column outputs follow the transitions asynchronously, with the only delay being that imparted by the inherent delay through the inverter feedback pairs. When the row inputs switch or transition to the opposite state, the transition detector of each row provides an output which, through the OR tie, triggers the pull-down switches. These pull-down switches are capable of overriding the feedback inverter pair to force the column low if it had previously been high and if no other row is holding the column high. For this transition, the matrix operates synchronously.
Selected Publications
Graduate Student Seminar
Georgia Tech1993, 1995, 1997
Design for Low Power
ICSPAT / DSP World Expo.Pudu, S., Johnson, T.
1996
Applications
HEART ConferenceDefense Nuclear Agency
An Analog Network for Gamma Induced Impulse Noise Suppression
PublicationMyers, B., Johnson, T.
1992
Design Considerations for BiMOS Mixed Signal
PublicationWiles, W., Myers, B., Johnson, T.
1992
